Masoudnia, A.; Sarbazi-Azad, H.; Boussakta, S. Design and performance of a pixel-level pipelined-parallel architecture for high speed wavelet-based image compression. (English) Zbl 1156.68605 Comput. Electr. Eng. 31, No. 8, 572-588 (2005). MSC: 68U10 × Cite Format Result Cite Review PDF Full Text: DOI
Boston, Nigel Pipelined IIR filter architecture using pole-radius minimization. (English) Zbl 1101.68303 J. VLSI Signal Process. Syst. Signal Image Video Technol. 39, No. 3, 323-331 (2005). MSC: 68M07 68M99 × Cite Format Result Cite Review PDF Full Text: DOI
Hong, Sangjin; Djurić, Petar M.; Bolić, Miodrag Simplifying physical realization of Gaussian particle filters with block-level pipeline control. (English) Zbl 1107.94345 EURASIP J. Appl. Signal Process. 2005, No. 4, 575-587 (2005). MSC: 94A12 93E11 × Cite Format Result Cite Review PDF Full Text: DOI