Summary: In the packed string matching problem, it is assumed that each machine word can accommodate up to \(\alpha\) characters, thus an \(n\)-character string occupies \(n/\alpha\) memory words.
(a) We extend the Crochemore-Perrin constant-space \(O(n)\)-time string-matching algorithm to run in optimal \(O(n/\alpha)\) time and even in real-time, achieving a factor \(\alpha\) speedup over traditional algorithms that examine each character individually. Our macro-level algorithm only uses the standard \(\mathrm{AC}^0\) instructions of the word-RAM model (i.e. no integer multiplication) plus two specialized micro-level \(\mathrm{AC}^0\) word-size packed-string instructions. The main word-size string-matching instruction wssm is available in contemporary commodity processors. The other word-size maximum-suffix instruction wslm is only required during the pattern pre-processing. Benchmarks show that our solution can be efficiently implemented, unlike some prior theoretical packed string matching work.
(b) We also consider the complexity of the packed string matching problem in the classical word-RAM model in the absence of the specialized micro-level instructions wssm and wslm. We propose micro-level algorithms for the theoretically efficient emulation using parallel algorithms techniques to emulate wssm and using the Four-Russians technique to emulate wslm. Surprisingly, our bit-parallel emulation of wssm also leads to a new simplified parallel random access machine string-matching algorithm. As a byproduct to facilitate our results we develop a new algorithm for finding the leftmost (most significant) 1 bits in consecutive non-overlapping blocks of uniform size inside a word. This latter problem is not known to be reducible to finding the rightmost 1, which can be easily solved, since we do not know how to reverse the bits of a word in \(O(1)\) time.