This book aims at the integration of digital integrated circuit logic and layout design in order to improve overall design quality and shorten the process of complete design. This methodology is named one-pass synthesis because the goal is to merge layout optimization with logic synthesis into one process. This design paradigm allows iterations to be avoided in designing layout in the case when the netlists after the logical synthesis will not produce the optimal layout.
This book reviews existing synthesis methods and shows how the layout aspects are incorporated in the development of modern synthesis systems. To achieve the optimal design by unifying the design levels, two following approaches are helpful – either the layout information is used during the logic synthesis phase or the optimization is restricted in one level such that it better fits to the next design level.
This monograph dwells on hot topics which are useful for the development of computer-aided tools in circuit design.