Combinational static CMOS networks. (English) Zbl 0595.94021
VLSI algorithms and architectures, Proc. Aegean Workshop Comput., Loutraki/Greece 1986, Lect. Notes Comput. Sci. 227, 271-282 (1986).
Summary: [For the entire collection see Zbl 0587.00021.]
We develop mathematical switch-level models for static combinational CMOS networks. In contrast to other available MOS models and theories, our models capture design principles that are special to CMOS, such as the use of transmission gates. First we study networks consisting of cascade connections of CMOS cells realizing negative functions. We then extend this model to incorporate transmission gates. Finally, we develop a more complex CMOS graph model which includes a ternary transient analysis and is capable of handling some unconventional, but commercially used, combinational networks. Such designs cannot be properly explained by presently available theories. Also, we discuss several general design approaches.
We develop mathematical switch-level models for static combinational CMOS networks. In contrast to other available MOS models and theories, our models capture design principles that are special to CMOS, such as the use of transmission gates. First we study networks consisting of cascade connections of CMOS cells realizing negative functions. We then extend this model to incorporate transmission gates. Finally, we develop a more complex CMOS graph model which includes a ternary transient analysis and is capable of handling some unconventional, but commercially used, combinational networks. Such designs cannot be properly explained by presently available theories. Also, we discuss several general design approaches.
MSC:
| 94C15 | Applications of graph theory to circuits and networks |
| 94C10 | Switching theory, application of Boolean algebra; Boolean functions (MSC2010) |
| 68R10 | Graph theory (including graph drawing) in computer science |
