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Large-Memory Nodes for Energy Efficient High-Performance Computing

Published: 03 October 2016 Publication History

Abstract

Energy consumption is by far the most important contributor to HPC cluster operational costs, and it accounts for a significant share of the total cost of ownership. Advanced energy-saving techniques in HPC components have received significant research and development effort, but a simple measure that can dramatically reduce energy consumption is often overlooked. We show that, in capacity computing, where many small to medium-sized jobs have to be solved at the lowest cost, a practical energy-saving approach is to scale-in the application on large-memory nodes. We evaluate scaling-in; i.e. decreasing the number of application processes and compute nodes (servers) to solve a fixed-sized problem, using a set of HPC applications running in a production system. Using standard-memory nodes, we obtain average energy savings of 36%, already a huge figure. We show that the main source of these energy savings is a decrease in the node-hours (node_hours = #nodes x exe_time), which is a consequence of the more efficient use of hardware resources.
Scaling-in is limited by the per-node memory capacity. We therefore consider using large-memory nodes to enable a greater degree of scaling-in. We show that the additional energy savings, of up to 52%, mean that in many cases the investment in upgrading the hardware would be recovered in a typical system lifetime of less than five years.

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  • (2018)Mainstream vs. Emerging HPC: Metrics, Trade-Offs and Lessons Learned2018 30th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD)10.1109/CAHPC.2018.8645891(250-257)Online publication date: Sep-2018
  • (2017)Main Memory in HPCACM Transactions on Architecture and Code Optimization10.1145/302336214:1(1-26)Online publication date: 6-Mar-2017
  1. Large-Memory Nodes for Energy Efficient High-Performance Computing

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    cover image ACM Other conferences
    MEMSYS '16: Proceedings of the Second International Symposium on Memory Systems
    October 2016
    463 pages
    ISBN:9781450343053
    DOI:10.1145/2989081
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Published: 03 October 2016

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    Author Tags

    1. Capacity computing
    2. Energy efficiency
    3. High-performance computing
    4. Large-memory nodes
    5. Scaling-in

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    • (2018)Mainstream vs. Emerging HPC: Metrics, Trade-Offs and Lessons Learned2018 30th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD)10.1109/CAHPC.2018.8645891(250-257)Online publication date: Sep-2018
    • (2017)Main Memory in HPCACM Transactions on Architecture and Code Optimization10.1145/302336214:1(1-26)Online publication date: 6-Mar-2017

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