Document Zbl 1258.94022

FPGA-implementation of discrete wavelet transform with application to signal denoising. (English) Zbl 1258.94022

Circuits Syst. Signal Process. 31, No. 3, 987-1015 (2012).

Summary: This paper presents new architectures for real-time implementation of the forward/inverse discrete wavelet transforms and their application to signal denoising. The proposed real-time wavelet transform algorithms present the advantage to ensure perfect reconstruction by equalizing the filter path delays. The real-time signal denoising algorithm is based on the equalized filter paths wavelet shrinkage, where the noise level is estimated using only few samples. Different architectures of these algorithms are implemented on FPGA using Xilinx System Generator for DSP and XUP Virtex-II Pro development board. These architectures are evaluated and compared in terms of reconstruction error, denoising performance and resource utilization.

Cited in 2 Documents

MSC:

94A12	Signal theory (characterization, reconstruction, filtering, etc.)
65T60	Numerical methods for wavelets

Keywords:

wavelet transform; signal denoising; soft-thresholding; filter group delay; pipelining; FPGA

Software:

Matlab

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Full Text: DOI

References:

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