Summary: This paper considers synthesis of a multi-valued carry look-ahead adder, which can be applied to a converter of a redundant number to a standard number. It also proposes the circuit design of a high-speed CMOS four-digit quaternary CLA by using mixed CMOS current-mode circuits for multivalued operations and CMOS voltage-mode circuits for binary operations. The circuit performance of an MVCLA is confirmed by HSpice simulation and estimation with the 0.8 \(\mu\)m CMOS process parameters of MOSIS. Extension to the \(n\)-digit CLA \((n>4)\) is also discussed.