This book is written by engineers from IBM Microelectronics and is a result of the authors’ experience in designing and fabrication of CMOS microprocessors. Many practical rules, often rules of thumb, are formulated for quarter-micron CMOS technology. The subject of the book are electrical schemes of CMOS circuits, their properties and some characteristics of the technological fabrication processes.
The first chapter of the book describes the CMOS process variations caused by fabricator-to-fabricator variations, inter-die and intra-die variations and how they may influence on the differences between the real and desired electrical parameters. The next two chapters are devoted to non-clocked and clocked logic designs. The following chapter discusses margins of circuit design and design variability. The next chapter focuses on types of storage elements and their design, how they fit into an overall chip system, and the types of errors that can occur in latch designs. Further text examines interfaces for short-channel CMOS devices in high-speed applications, the problems associated with clock systems, such as jitter, skew and noise generation and clock generation and clock distribution. The final chapter discusses scaling theory and how scaling theory may help to overcome challenges presented by new emerging technologies.
This book is a comprehensive source of ideas and may serve well as a “cookbook” for CMOS designers.