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Timing Analysis of System Initialization and Crash Recovery for a Segment-Based Flash Translation Layer

Published: 01 April 2012 Publication History

Abstract

Recently, the capacity of flash-memory storage systems has grown rapidly, and flash-memory technology has advanced along with the wave of consumer electronics and embedded systems. In order to properly manage product cost and initialization performance, vendors face serious challenges in system design and analysis. Thus, the timing analysis of system initialization and crash recovery for a segment-based flash translation layer has become an important research topic. This article focuses on system initialization, crash recovery, and timing analysis. The timing analysis of system initialization involves the relationship between the size of the main memory and the system initialization time. The timing analysis of crash recovery explains the worst case recovery time. The experiments in this study show that the timing analysis of system initialization and crash recovery can be applied to the segment-based flash translation layer.

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  • (2021)A Crash Recovery Scheme for a Hybrid Mapping FTL in NAND Flash Storage DevicesElectronics10.3390/electronics1003032710:3(327)Online publication date: 1-Feb-2021
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  • (2017)KV-FTL: A Novel Key-Value-Based FTL Scheme for Large Scale SSDs2017 IEEE 19th International Conference on High Performance Computing and Communications; IEEE 15th International Conference on Smart City; IEEE 3rd International Conference on Data Science and Systems (HPCC/SmartCity/DSS)10.1109/HPCC-SmartCity-DSS.2017.14(106-114)Online publication date: Dec-2017
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Published In

cover image ACM Transactions on Design Automation of Electronic Systems
ACM Transactions on Design Automation of Electronic Systems  Volume 17, Issue 2
April 2012
170 pages
ISSN:1084-4309
EISSN:1557-7309
DOI:10.1145/2159542
Issue’s Table of Contents
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 01 April 2012
Accepted: 01 November 2011
Revised: 01 November 2011
Received: 01 July 2010
Published in TODAES Volume 17, Issue 2

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Author Tags

  1. Flash-memory storage systems
  2. embedded systems
  3. system initialization and crash recovery

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Cited By

View all
  • (2021)A Crash Recovery Scheme for a Hybrid Mapping FTL in NAND Flash Storage DevicesElectronics10.3390/electronics1003032710:3(327)Online publication date: 1-Feb-2021
  • (2021)Rapid Recovery by Maximizing Page-Mapping Logs DeactivationIEICE Transactions on Information and Systems10.1587/transinf.2020EDL8141E104.D:6(885-889)Online publication date: 1-Jun-2021
  • (2017)KV-FTL: A Novel Key-Value-Based FTL Scheme for Large Scale SSDs2017 IEEE 19th International Conference on High Performance Computing and Communications; IEEE 15th International Conference on Smart City; IEEE 3rd International Conference on Data Science and Systems (HPCC/SmartCity/DSS)10.1109/HPCC-SmartCity-DSS.2017.14(106-114)Online publication date: Dec-2017
  • (2016)An Adaptive Demand-Based Caching Mechanism for NAND Flash Memory Storage SystemsACM Transactions on Design Automation of Electronic Systems10.1145/294765822:1(1-22)Online publication date: 13-Dec-2016
  • (2015)Lazy-RTGCACM Transactions on Design Automation of Electronic Systems10.1145/274623620:3(1-32)Online publication date: 24-Jun-2015
  • (2014)Asymmetric Programming: A Highly Reliable Metadata Allocation Strategy for MLC NAND Flash Memory-Based Sensor SystemsSensors10.3390/s14101885114:10(18851-18877)Online publication date: 10-Oct-2014
  • (2014)Deterministic Crash Recovery for NAND Flash Based Storage SystemsProceedings of the 51st Annual Design Automation Conference10.1145/2593069.2593124(1-6)Online publication date: 1-Jun-2014
  • (2014)BLASACM Transactions on Design Automation of Electronic Systems10.1145/255561619:2(1-29)Online publication date: 28-Mar-2014
  • (2014)A Reliability-Aware Address Mapping Strategy for NAND Flash Memory Storage SystemsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2014.234792933:11(1623-1631)Online publication date: Nov-2014
  • (2014)On-Demand Block-Level Address Mapping in Large-Scale NAND Flash Storage SystemsIEEE Transactions on Computers10.1109/TC.2014.2329680(1-1)Online publication date: 2014
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