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12-spin-qubit arrays fabricated on a 300 mm semiconductor manufacturing line
Hubert C. George, Mateusz T. Mądzik, Eric M. Henry, Andrew J. Wagner, Mohammad M. Islam, Felix Borjans, Elliot J. Connors, Joelle Corrigan, Matthew Curry, Michael K. Harper, Daniel Keith, Lester Lampert, Florian Luthi, Fahd A. Mohiyaddin, Sandra Murcia, Rohit Nair, Rambert Nahm, Aditi Nethwewala, Samuel Neyens, Roy D. Raharjo, et al (10)
Oct 23 2024 cond-mat.mes-hall quant-ph arXiv:2410.16583v1

@misc{2410.16583, author = {Hubert C.~George and Mateusz T.~Mądzik and Eric M.~Henry and Andrew J.~Wagner and Mohammad M.~Islam and Felix Borjans and Elliot J.~Connors and Joelle Corrigan and Matthew Curry and Michael K.~Harper and Daniel Keith and Lester Lampert and Florian Luthi and Fahd A.~Mohiyaddin and Sandra Murcia and Rohit Nair and Rambert Nahm and Aditi Nethwewala and Samuel Neyens and Roy D.~Raharjo and Carly Rogan and Rostyslav Savytskyy and Thomas F.~Watson and Josh Ziegler and Otto K.~Zietz and Ravi Pillarisetty and Nathaniel C.~Bishop and Stephanie A.~Bojarski and Jeanette Roberts and James S.~Clarke}, title = {12-spin-qubit arrays fabricated on a 300 mm semiconductor manufacturing line}, year = {2024}, eprint = {2410.16583}, note = {arXiv:2410.16583v1} }
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Intels efforts to build a practical quantum computer are focused on developing a scalable spin-qubit platform leveraging industrial high-volume semiconductor manufacturing expertise and 300 mm fabrication infrastructure. Here, we provide an overview of the design, fabrication, and demonstration of a new customized quantum test chip, which contains 12-quantum-dot spin-qubit linear arrays, code named Tunnel Falls. These devices are fabricated using immersion and extreme ultraviolet lithography (EUV), along with other standard high-volume manufacturing (HVM) processes, as well as production-level process control. We present key device features and fabrication details, as well as qubit characterization results confirming device functionality. These results corroborate our fabrication methods and are a crucial step towards scaling of extensible 2D qubit array schemes.