Automatic abstraction and verification of verilog models

ZS Andraus, KA Sakallah�- Proceedings of the 41st annual Design�…, 2004 - dl.acm.org
Abstraction plays a critical role in verifying complex sys-tems. A number of languages have
been proposed to model hardware systems by, primarily, abstracting away their wide …

AMUSE: a minimally-unsatisfiable subformula extractor

Y Oh, MN Mneimneh, ZS Andraus…�- Proceedings of the 41st�…, 2004 - dl.acm.org
This paper describes a new algorithm for extracting unsatisfiable subformulas from a given
unsatisfiable CNF formula. Such unsatisfiable "cores" can be very helpful in diagnosing the …

Reveal: A formal verification tool for verilog designs

ZS Andraus, MH Liffiton, KA Sakallah�- Logic for Programming, Artificial�…, 2008 - Springer
We describe the Reveal formal functional verification system and its application to four
representative hardware test cases. Reveal employs counterexample-guided abstraction …

Refinement strategies for verification methods based on datapath abstraction

ZS Andraus, MH Liffiton, KA Sakallah�- Proceedings of the 2006 Asia and�…, 2006 - dl.acm.org
In this paper we explore the application of Counter example-Guided Abstraction Refinement
(CEGAR) in the context of microprocessor correspondence checking. The approach utilizes …

[PDF][PDF] CEGAR-based formal hardware verification: A case study

ZS Andraus, MH Liffiton, KA Sakallah�- Ann Arbor, 2007 - eecs.umich.edu
We describe the application of the Reveal formal functional verification system to six representative
hardware test cases. Reveal employs counterexample-guided abstraction refinement…

[PDF][PDF] Scalable Hardware Verification based on Datapath Abstraction, Counterexample-Guided Refinement, and Satisfiability Modulo Theories

ZS Andraus, KA Sakallah�- Ann Arbor - Citeseer
We describe the Reveal formal functional verification system and its application to three
representative hardware test cases. Reveal employs counterexample-guided abstraction …

[PDF][PDF] Vapor User Guide (v0. 95)

Z Andraus - 2004 - Citeseer
Zaher Andraus Department of Electrical Engineering and Computer Science University of
Michigan, Ann Arbor October 2004 … Next, we will introduce Vapor’s naming convention for�…

[PDF][PDF] From max-sat to min-unsat: Insights and applications

MH Liffiton, ZS Andraus, KA Sakallah�- Ann Arbor, 2005 - eecs.umich.edu
This report describes a strong connection between maximum satisfiability and minimally-unsatisfiable
subformulas of any constraint system, as well as techniques for exploiting it. …

[PDF][PDF] File Prefetching for Mobile Devices Using On-line Learning

Z Andraus, A Nicholson, Y Vorobeychik - Citeseer
… our system beats the baseline by 10% for the 56 Kb/s tests, and almost 15% for the 28.8
Kb/s tests. … The results show our system outperforms Kroeger’s trie for 100, 56, and 28.8 Kb/s

Automatic formal verification of control logic in hardware designs

ZS Andraus - 2009 - search.proquest.com
Our work addresses the challenge of scaling pre-silicon functional verification of hardware
designs such as microprocessors and microcontrollers. These designs employ wide …