Multi-FPGA system prototyping has become popular for modern VLSI logic verification, but
such a system realization is often limited by its number of inter-FPGA connections. As a
result, time-division multiplexing (TDM) is employed to accommodate more inter-FPGA
signals than the connections in a multi-FPGA system. However, the inter-FPGA signal delay
induced by TDM becomes significant due to time-multiplexing. Researchers have shown
that TDM ratios (signal time-multiplexing ratios) significantly affect the performance of a multi�…

Multi-FPGA prototyping is widely used for modern VLSI verification, but the limited number of
inter-FPGA connections in a multi-FPGA system may cause routing failures. As a result, the
time-division multiplexing (TDM) technique is adopted to increase its resource utilization by
transmitting multiple signals through the same routing channel. Due to the large signal delay
between FPGA pairs, however, the performance of such a system greatly depends on the
inter-FPGA routing quality. In this paper, we propose a TDM-based system-level routing�…