[PDF][PDF] Parallel backprojection: A case study in high-performance reconfigurable computing

B Cordes, M Leeser�- EURASIP Journal on Embedded Systems, 2009 - Springer
EURASIP Journal on Embedded Systems, 2009Springer
High-performance reconfigurable computing (HPRC) is a novel approach to provide large-
scale computing power to modern scientific applications. Using both general-purpose
processors and FPGAs allows application designers to exploit fine-grained and coarse-
grained parallelism, achieving high degrees of speedup. One scientific application that
benefits from this technique is backprojection, an image formation algorithm that can be
used as part of a synthetic aperture radar (SAR) processing system. We present an�…
Abstract
High-performance reconfigurable computing (HPRC) is a novel approach to provide large-scale computing power to modern scientific applications. Using both general-purpose processors and FPGAs allows application designers to exploit fine-grained and coarse-grained parallelism, achieving high degrees of speedup. One scientific application that benefits from this technique is backprojection, an image formation algorithm that can be used as part of a synthetic aperture radar (SAR) processing system. We present an implementation of backprojection for SAR on an HPRC system. Using simulated data taken at a variety of ranges, our implementation runs over 200 times faster than a similar software program, with an overall application speedup better than 50x. The backprojection application is easily parallelizable, achieving near-linear speedup when run on multiple nodes of a clustered HPRC system. The results presented can be applied to other systems and other algorithms with similar characteristics.
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