A two's complement parallel array multiplication algorithm
CR Baugh, BA Wooley�- IEEE Transactions on computers, 1973 - ieeexplore.ieee.org
CR Baugh, BA Wooley
IEEE Transactions on computers, 1973•ieeexplore.ieee.orgAn algorithm for high-speed, two's complement, m-bit by n-bit parallel array multiplication is
described. The two's complement multiplication is converted to an equivalent parallel array
addition problem in which each partial product bit is the AND of a multiplier bit and a
multiplicand bit, and the signs of all the partial product bits are positive.
described. The two's complement multiplication is converted to an equivalent parallel array
addition problem in which each partial product bit is the AND of a multiplier bit and a
multiplicand bit, and the signs of all the partial product bits are positive.
An algorithm for high-speed, two's complement, m-bit by n-bit parallel array multiplication is described. The two's complement multiplication is converted to an equivalent parallel array addition problem in which each partial product bit is the AND of a multiplier bit and a multiplicand bit, and the signs of all the partial product bits are positive.
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