Apr 30, 2019 � This paper proposes a new method to increase the reliability of SRAM, without dramatically increasing costs in memory space and processing time.
The next generations of embedded systems must on one side support Multiple-Bit Upsets (MBU) and avoid to induce a significant memory and processing overheads on�...
The next generations of embedded systems must on one side support Multiple-Bit Upsets (MBU) and avoid to induce a significant memory and processing overheads on�...
Technological advances make it possible to produce increasingly complex electronic components. Nevertheless, these advances are convoyed by an increasing�...
This paper proposes a new method to increase the reliability of SRAM, without dramatically increasing costs in memory space and processing time. Our method,�...
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To tackle this problem we propose a new memory reliability techniques referred to as DPSR: Double Parity Single Redundancy. DPSR is designed to enhance�...
DPSR is designed to enhance computing systems resilience to SBU and MBU. Based on a thorough fault injection experiments, DPSR shows promising results; It�...
To tackle this problem we propose a new memory reliability techniques referred to as DPSR: Double Parity Single Redundancy. DPSR is designed to enhance�...
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1994. TLDR. A new technique to improve the reliability of SRAMs used in space radiation environments by using built-in current sensor circuits that detect�...
... memory arrays. We propose an EDAC technique that is based on spatial redundancy allied to a simple parity scheme per byte to guarantee memory reliability.