Abstract
A fully integrated 60-GHz transceiver for 802.11ad applications with superior performance in a 90-nm CMOS process versus prior arts is proposed and real based on a field-circuit co-design methodology. The reported transceiver monolithically integrates a receiver, transmitter, PLL(Phase-Locked Loop) synthesizer, and LO (Local Oscillator) path based on a sliding-IF architecture. The transceiver supports up to a 16QAM modulation scheme and a data rate of 6 Gbit/s per channel, with an EVM (Error Vector Magnitude) of lower than −20 dB. The receiver path achieves a configurable conversion gain of 36∼64 dB and a noise figure of 7.1 dB over 57∼64 GHz, while consuming only 177 mW of power. The transmitter achieves a conversion gain of roughly 26 dB, with an output P1dB of 8 dBm and a saturated output power of over 10 dBm, consuming 252 mW of power from a 1.2-V supply. The LO path is composed of a 24-GHz PLL, doubler, and a divider chain, as well as an LO distribution network. In closed-loop operation mode, the PLL exhibits an integrated phase error of 3.3° rms (from 100 kHz to 100 MHz) over prescribed frequency bands, and a total power dissipation of only 26 mW. All measured results are rigorously loyal to the simulation.
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This work is supported by The National High Technology Research and Development Program of China (No.2011AA010202, No.2015AA01A704), The National Natural Science Foundation of China (No.61101001, No.61204026, No.61331003), The Tsinghua University Initiative Scientific Research Program.
ZHANG Lei [corresponding author] graduated with honors from the Department of Electronic Engineering in Tsinghua University, Beijing, China, in 2003, and received his Ph.D. degree in Tsinghua University in 2008. His research interests cover analog and RF/mmW/THz integrated circuits and systems for Gbit/s wireless communications and imaging, automotive radar, data converters, CMOS integrated microarray biochips for biosensing and biodetections, and integrated neuromorphic circuits and systems. Prof. Zhang is a member of Institute of Electrical and Electronics Engineers (IEEE), and has directed/participated over 10 projects including National Basic Research Program of China, National High-tech R&D Program of China, NSFC, DARPA of U.S. etc., and published more than 60 technical papers, co-authored 3 technical book, and held 9 patents.
LUO Jun was born in Nanchang, Jiangxi Province, China, in 1986. He received his Ph.D. degree in the Institute of Microelectronics, Tsinghua University, Beijing, China, in 2014. His research activity is focused on the RF circuits and systems, including PLL-based frequency synthesizers and RF front-ends and systems for millimeter-wave communication applications.
ZHU Wei was born in Nanjing, Jiangsu Province, China, in 1989. He received his M.S degree in the Institute of Microelectronics, Tsinghua University, Beijing, China, in 2014, and he is currently working toward his Ph.D. degree in Institute of Microelectronics, Tsinghua University, Beijing, China. His research activity is focused on the RF/millimeter-wave integrated circuits and systems for next generation communication applications. He also conducts some research on data converters and analog baseband.
ZHANG Li received the B.S. degree in electronic engineering from Tsinghua University, Beijing, China, in 1994, and the M.S. degrees from the Institute of Microelectronics, Chinese Academy of Science, Beijing, in 1997. Since 1997, she has been a Lecturer with the Institute of Microelectronics, Tsinghua University. Her research centers on device modeling and RF circuit design.
WANG Yan received the B.S. and M.S. degrees in electrical engineering from Xi’an Jiaotong University, Xi’an, China, in 1988 and 1991, respectively, and the Ph.D. degree in semiconductor device and physics from the Institute of Semiconductors, Chinese Academy of Science in 1995. Since 1999, she has been a Professor with the Institute of Microelectronics, Tsinghua University, Beijing, China. Now, her research focuses on device modeling and circuit design in MMW/THz range.
YU Zhiping graduated from Tsinghua University, Beijing, China, in 1967 with B.S. degree, he received M.S. and Ph.D. degrees from Stanford University, Stanford, CA, US in 1980, and 1985, respectively. He is presently professor in the Institute of Microelectronics, Tsinghua University, Beijing, China, and since 2008 a visiting professor in EE Department at Stanford University, CA, USA. Between 2006 and 2012, he is the Novellus Microelectronics Professor in Tsinghua. He has been project leader for several national research programs on micro- and nano-electronics in China for more than 10 years. His research interests include nanoelectronics and nano-scaled CMOS, compact modeling and circuit design in RF CMOS, and semiconductor device simulation. He has published more than 350 technical papers and is the co-author of a book on TCAD (Technology CAD) in English. A co-authored book on RF CMOS circuit design (in Chinese) was published by Tsinghua University Press in 2006. He is an IEEE Fellow and served as the Associate Editor of IEEE Trans. CAD of IC & Systems (ICCAD) from 1996 to 2005. He now serves as member of IEEE EDS Nanotechnology Committee since 2006 and Semiconductor Manufacturing Committee starting from the beginning of 2012.
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Zhang, L., Luo, J., Zhu, W. et al. A fully integrated CMOS 60-GHz transceiver for IEEE802.11ad applications. J. Commun. Inf. Netw. 1, 45–61 (2016). https://doi.org/10.1007/BF03391557
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DOI: https://doi.org/10.1007/BF03391557