Abstract
The extent of this work is to plan and execute an ASIC (application-specific integrated circuit)-like reconfigurable architectural algorithm. A practical engineering SDR (software-defined radio) baseband (BB) receiver collector has just been inferred which is equipped for getting both OFDM (orthogonal frequency-division multiplexing) and stage-adjusted signs.
This work includes the estimation of computational complexities of different sub-blocks of the collector receiver. The outcomes acquired are utilized for the distinguishing proof of sub-hinders with comparative computational complexities in the receivers. The FIR (finite impulse response) and FFT (fast Fourier transform) functional unit blocks are recognized as the most computationally escalated parts and have been additionally broke down for computational necessities and equipment execution in the receivers. A coarse-grained, powerfully reconfigurable, tile-based equipment engineering is proposed to implement the calculations. There are nine independent tiles (information preparing components) in the framework. The self-sufficient nature of a tile permits simple adaptability and testability of the framework. The structure is finished utilizing 16-bit settled point information organized and is contrasted and the floating point programming execution.
The proposed execution is contrasted and the usage on the Montium tile processor (TP) (Kapoor, A Reconfigurable Architecture of Software-Defined-Radio for Wireless Local Area Networks, 2005), as far as area and speed parameters are concerned. This correlation demonstrates a region decrease of around multiple times in our design contrasted with the Montium TP-based execution. This decrease comes to the detriment of restricted adaptability. The FFT execution done is additionally contrasted as well as different other FFT usages. This examination demonstrates each performance/adaptability and exchange between these usage implementations.
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Nataraj Urs, H.D., Venkata Siva Reddy, R., Gudodagi, R., Sudharshan, K.M., Aravind, B.N. (2023). A Novel Algorithm for Reconfigurable Architecture for Software-Defined Radio Receiver on Baseband Processor for Demodulation. In: Awasthi, S., Sanyal, G., Travieso-Gonzalez, C.M., Kumar Srivastava, P., Singh, D.K., Kant, R. (eds) Sustainable Computing. Springer, Cham. https://doi.org/10.1007/978-3-031-13577-4_11
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